Tunnel FETs are now foreseen as coming sooner than III-V channels

Paolo Gargini, Intel Fellow and chairman of the International Technology Roadmap for Semiconductors (ITRS) used a talk at the Industry Strategy Symposium Europe held by the SEMI industry organization in Grenoble, to discuss the prospect of a field effect transistor combined with quantum tunneling as a means of reducing power consumption while maintaining adequate performance.
See post here:
http://www.eetimes.com/electronics-news/4213661/Intel-s-Gargini-sees-tunnel-FET-as-transistor-option/